In early July the US Defence Advanced Research Projects Agency (DARPA) began soliciting proposals for is Advanced Single-Event Radiation Testing Programme, better known as ASSERT.
Proposals for the ASSERT programme are due by 15th September, DARPA says. Dr. David Abe, the agency’s microsystems technology office programme manager told Armada that it expects “to have performers under contract and work to begin in February 2024.” He said that ASSERT is expected to have a 54-month duration with work due to conclude by late 2028.
3DHI Components
Dr. Abe says that ASSERT “is a technology development programme that aims to design and experimentally demonstrate proof-of-concept prototype sources to simulate the effects of ionizing radiation on advanced microelectronics.” Key to this effort is the development of capabilities to explore the effects of “radiation-induced single-events” on Three-Dimensional Heterogeneously Integrated (3DHI) components.
Definitions differ but 3DHI refers to several integrated circuits which are stacked and connected vertically. The rationale is to get these disparate circuits to behave as a single device. The 3DHI approach can yield power and space savings compared to conventional circuit designs. The radiation-induced single-events Dr. Abe talks about are the type experienced by spacecraft during increased solar activity or while flying through Earth’s Van Allen Belts. The charged particles that exist in these harsh environments interact with space-bound electronics by generating charge in semiconductor materials. As electronic devices require the precise movement of charge for reliable operation, the charge generated by ionizing radiation results in single-event effects ranging from bit upsets to catastrophic failure.
Deliverables
ASSERT’s deliverables include techniques and technologies to generate radiation effects data for specific electronic devices. Plans are afoot to transition ASSERT’s deliverables into the microelectronics industry to aid single-event effects radiation testing and characterisation. Academia may also make use of ASSERT technology “to explore new physics and to validate new theory and computational models.”
Dr. Abe said that ASSERT’s deliverables will be developed to Technology Readiness Level-4 (TRL-4). According to US Department of Defence definitions this means the technology has been validated in a laboratory environment. One of ASSERT’s outputs include engineering design packages that will enable ASSERT technologies to be manufactured by commercial vendors and suppliers.
Ultimately, the “ASSERT programme goal is to reduce by a factor of ten the time to design, test, and deploy radiation-qualified components,” says Dr. Abe. “To accomplish this goal, ASSERT aims to create single-event effects source technologies that are compact, have precise beam energy and spatial controls, and can be readily installed in laboratory and industrial spaces.” A key goal of ASSERT is to perform early radiation testing and characterisation during the integrated circuit development process. This approach “will provide insights into fault mechanisms and inform rapid design optimisation and accelerate deployment of mission-critical capabilities.”
Applications for ASSERT’s technologies include commercial satellites, the automotive industry and server farms. In fact, the technology could have relevance for any industry or organisation which must keep its microelectronics safe from dangerous levels of electromagnetic radiation. ASSERT will not eliminate the need for standard radiation shielding layers. Instead, “it will inform the design of more robust microelectronic circuits to improve reliability and reduce the amount of ionizing radiation shielding required to protect the system,” Dr. Abe concludes.
by Dr. Thomas Withington
